【描述】XVME-616 CPU模块

特点:

• 时钟速度为20MHz
• 最大执行速度667万eLL
• 35纳秒SRAM
• 16位宽和1024字深
• 512个56位微码字

xfme-616 CPU模块在双高Eurocard上实现，采用SSI和MSI高级肖特基TTL器件，时钟速度为20MHz，最高执行速度为每秒667万条eLL指令。这两个堆栈用35 nSec SRAM实现，并且都是16位宽和1024字深。执行序列器包含512个56位微码字。总线结构基于24位地址、16位双向数据总线，同步操作速度为每秒667万个总线读或写周期。该指令集是可微程序设计和可扩展的，目前由85个与C语言程序执行相关的原语组成。此外，还有许多与硬件和VME总线接口相关的原语。该体系结构允许CPU不仅适用于hll的执行，而且通过创建新的微编码原语，还适用于需要特定数据操作或处理过程的应用。以这种方式，处理器可以成为专用CPU。

XVME-616

Features:
Clock speed is 20MHz
Maximum execution speed of 6.67 million eLL
35 nanosecond SRAM
16 bit width and 1024 word depth
512 56 bit microcode words
The xfme-616 CPU module is implemented on a dual high Eurocard, using advanced Schottky TTL devices such as SSI and MSI, with a clock speed of 20MHz and a maximum execution speed of 6.67 million eLL instructions per second. These two stacks are implemented using 35 nSec SRAM, and both are 16 bit wide and 1024 word deep. The execution sequencer contains 512 56 bit microcode words. The bus structure is based on a 24 bit address, 16 bit bidirectional data bus, with a synchronous operation speed of 6.67 million bus read or write cycles per second. This instruction set is microprogrammable and extensible, currently consisting of 85 primitives related to C language program execution. In addition, there are many primitives related to hardware and VME bus interfaces. This architecture allows the CPU to not only be suitable for hll execution, but also for applications that require specific data operations or processing by creating new microcoding primitives. In this way, the processor can become a dedicated CPU.